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计算机工程 ›› 2006, Vol. 32 ›› Issue (23): 268-270. doi: 10.3969/j.issn.1000-3428.2006.23.095

• 开发研究与设计技术 • 上一篇    下一篇

基于嵌入式处理器的H .264编码器的存储优化

徐 宁,史 册,陈梅丽   

  1. (浙江大学信息与电子工程学系,杭州 310027)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2006-12-05 发布日期:2006-12-05

Memory Optimization Scheme of H.264/AVC Encoder
Based on Embedded Processor

XU Ning, SHI Ce, CHENG Meili   

  1. (Dept. of Information & Electronic Engineering, Zhejiang Univ., Hangzhou 310027)
  • Received:1900-01-01 Revised:1900-01-01 Online:2006-12-05 Published:2006-12-05

摘要: 由于H.264/AVC新标准采用了很多新技术,在可编程处理器的应用领域中,如果不进行优化将会需要非常大的存储空间。该文对编码器的存储复杂度进行了分析,在此基础上提出了基于宏块级的滤波和插值算法。为了便于嵌入式处理器的实现,提出了一种高效的内存管理调度策略。实验结果表明,优化方法在极大地降低存储复杂度(cycle:64.9%)的同时得到了更高的编码速率(76.6%),而只有很小的编码效率损失。

关键词: H.264, 嵌入式处理器, 存储优化

Abstract: The newly introduced techniques adopted by H.264/AVC encoder requires large memory space for a programmable processor implementation without optimization. An improved algorithm of mb-level (Macroblock-level) interpolation and deblocking filter are proposed for H.264/AVC encoder based on memory usage analysis of the reference software (JM8.4). In order to implement the encoder on an embedded processor, an efficient memory management scheme is also presented. Experimental results show the approach can greatly improve encoding speed (74.9%) and reduce memory complexity (cycles: 68.2%) with negligible coding efficiency loss.

Key words: H.264/AVC, Embedded processor, Memory optimization