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计算机工程 ›› 2007, Vol. 33 ›› Issue (04): 253-255. doi: 10.3969/j.issn.1000-3428.2007.04.089

• 工程应用技术与实现 • 上一篇    下一篇

组合电路等价性检验方法研究

曾 琼1,2,闫 炜1   

  1. (1. 中国科学院成都计算机应用研究所,成都 610041;2. 成都信息工程学院计算机基础教学部,成都 610041)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2007-02-20 发布日期:2007-02-20

Research on Combinational Circuits Equivalence Check Method

ZENG Qiong1,2, YAN Wei1   

  1. (1. Chengdu Institute of Computer Application, Chinese Academy of Sciences, Chengdu 610041; 2. Department of Computer Teaching, Chengdu University of Information Technology, Chengdu 610041)
  • Received:1900-01-01 Revised:1900-01-01 Online:2007-02-20 Published:2007-02-20

摘要: 分析了数字电路等价性检验方法的基本原理,对组合电路等价性检验方法进行了综合研究,讨论了各种方法的特点,指出了各种方法的优缺点及其适用场合,总结了组合电路等价性检验方法的发展规律,指出了未来的发展方向。

关键词: 等价性检验, 组合电路, 二叉判定图, 布尔可满足, 自动测试向量产生

Abstract: This paper analyzes general equivalence checking methods, discusses combinational equivalence checking methods, studies characteristics and applications of the methods. At the end of this paper, laws of evolution of combinational equivalence checking are summarized and the direction of study on the combinational equivalence checking is indicated.

Key words: Equivalence check, Combinational circuits, Binary decision diagram(BDD), Boolean satisfiability, Automatic test pattern generation (ATPG)