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计算机工程 ›› 2007, Vol. 33 ›› Issue (24): 239-241. doi: 10.3969/j.issn.1000-3428.2007.24.084

• 工程应用技术与实现 • 上一篇    下一篇

片上网络体系结构的研究与进展

朱樟明1,周 端2,杨银堂1

  

  1. 1. 西安电子科技大学微电子研究所,西安 710071;2. 西安电子科技大学计算机学院,西安 710071
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2007-12-20 发布日期:2007-12-20

Research and Development on Network-on-chip Architectures

ZHU Zhang-ming1, ZHOU Duan2, YANG Yin-tang1   

  1. 1. Microelectronics Institute, Xidian University, Xi’an 710071; 2. Computer School, Xidian University, Xi’an 710071
  • Received:1900-01-01 Revised:1900-01-01 Online:2007-12-20 Published:2007-12-20

摘要: 片上网络(NoC)是基于多处理器技术的一种新型的计算集成形式,涉及硬件通信结构、中间件、操作系统通信服务、设计方法及工具等。NoC体系结构的设计重点是实现低功耗和高效通信/计算能力。该文介绍了4种新的NoC体系结构,并在同等约束下进行了功耗比较,2D网格结构的功耗最大、性能最差,聚合环面网络结构则最优。

关键词: 片上网络, 体系结构, 低功耗

Abstract: Network-on-chip(NoC) is a novel computation & communication integration for on-chip multi-processors. NoC consists of a library of soft macros, communication architectures, OS and design methodology. Low power performance and compute/communication ability are the keys. This paper discusses four NoC architectures. Considering the performance, area and power, it finds that the 2D mesh is the worst, and wormhole switched clustered torus is a viable topology for the NoC architectures.

Key words: Network-on-chip(NoC), architectures, low power

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