计算机工程 ›› 2008, Vol. 34 ›› Issue (14): 231-233.doi: 10.3969/j.issn.1000-3428.2008.14.082

• 工程应用技术与实现 • 上一篇    下一篇

低频电子标签基带处理器的设计与实现

田佳音,何 艳,施汝杰,闵 昊   

  1. (复旦大学专用集成电路和系统国家重点实验室,上海 201203)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2008-07-20 发布日期:2008-07-20

Design and Implementation of Baseband-processor for LF Tag

TIAN Jia-yin, HE Yan, SHI Ru-jie, MIN Hao   

  1. (State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203)
  • Received:1900-01-01 Revised:1900-01-01 Online:2008-07-20 Published:2008-07-20

摘要: 设计一款新型低频电子标签基带处理器,提出一种新颖的异步解码机制,解决了100% 振幅键控调制模式下时钟中断的问题,利用指令头解析与片选信号相结合的指令解析机制,提高了指令解析速度,并综合应用能量管理、结构优化等多种低功耗设计方法提高电子标签响应速度和抗干扰能力,降低芯片功耗与面积。该芯片采用SMIC 0.18 μm 2P4M标准CMOS工艺实现。与国外同类芯片相比,该设计以较小的面积与功耗实现了更高的性能。

关键词: 射频识别, 低频电子标签, 基带处理器

Abstract: A novel baseband-processor for Low Frequency(LF) Radio Frequency Identification(RFID) tag is presented. A new asynchronous method for data demodulation is proposed to solve the clock halting problem in 100% Amplitude Shift Key(ASK) modulation mode. A new command decoder is designed to increase command decoding speed. Several low-power techniques, such as power management, architecture optimization, etc., are also implemented to enhance tag responding speed and interference immunity and to reduce chip area as well as power consumption. The test results prove the completeness of its expected functionality and its low power consumption. The chip is fabricated in 0.18 μm 2P4M CMOS standard process.

Key words: Radio Frequency Identification (RFID), Low Frequency(LF) tag, baseband-processor

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