摘要： 针对SDRAM控制器读写数据块访问延时长、速度慢的问题，提出时间隐藏技术，将其应用于SDRAM控制器的设计，采用FPGA实现。实验结果表明，时间隐藏技术有效缩短了数据块读写访问延时，提高了读写速度，写4×4数据块可节约时间52%，读8×8数据块可节约时间44%。
关键词:
时间隐藏,
数据块,
SDRAM控制器
Abstract: In order to speed up the efficiency of SDRAM controller while reading/writing data blocks, this paper proposes a time-hiding method for the design of SDRAM controller. It implements this method on FPGA. Experiments indicate that this time-hiding method shortens the latency and increases the speed of accessing data blocks. For example, when writing 4×4 data blocks, this method saves access time by 52%, and when reading 8×8 data blocks, this method saves access time by 44%.
Key words:
time-hiding,
data block,
SDRAM controller
中图分类号:
王 斌;熊志辉;陈立栋;谭树人;张茂军. 具有时间隐藏特性的数据块读写SDRAM控制器[J]. 计算机工程, 2009, 35(4): 244-246.
WANG Bin; XIONG Zhi-hui; CHEN Li-dong; TAN Shu-ren; ZHANG Mao-jun. SDRAM Controller with Time-hiding Feature for Data Block Access[J]. Computer Engineering, 2009, 35(4): 244-246.