作者投稿和查稿 主编审稿 专家审稿 编委审稿 远程编辑

计算机工程 ›› 2009, Vol. 35 ›› Issue (5): 153-155. doi: 10.3969/j.issn.1000-3428.2009.05.053

• 安全技术 • 上一篇    下一篇

并行可配置ECC专用指令协处理器

仲先海,徐金甫,严迎建   

  1. (解放军信息工程大学电子技术学院,郑州 450004)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2009-03-05 发布日期:2009-03-05

Parallel and Reconfigurable ECC Application Specific Instruction-set Coprocessor

ZHONG Xian-hai, XU Jin-fu, YAN Ying-jian   

  1. (Institute of Electronic Technology, PLA Information Engineering University, Zhengzhou 450004)
  • Received:1900-01-01 Revised:1900-01-01 Online:2009-03-05 Published:2009-03-05

摘要: 采用软硬件结合的方法,给出一种基于VLIW的并行可配置椭圆曲线密码体制(ECC)专用指令协处理器架构。该协处理器采用点加、倍点并行调度算法,功能单元微结构采用可重构的思想,具有高度灵活性与较高运算速度,能支持域宽可伸缩的GF(p)与GF(2m)有限域上的可变参数Weierstrass曲线,签名认证算法可升级。实验结果表明,GF(p)域上192 bit的ECC点乘运算只需0.32 ms,比其他同类芯片运算速度提高了116%~350%。

关键词: 椭圆曲线密码体制, 并行, 可配置, 专用指令, 协处理器

Abstract: With the hardware/software co-design methodology, a parallel and reconfigurable architecture of Euiptic Curve Crypto System(ECC) application specific instruction-set coprocessor is proposed, which is based on VLIW processor techniques. The coprocessor introduces parallel ECC point addition and doubling scheduling algorithms. Based on the concept of reconfiguration, the micro-architectures of function modules are designed. The whole ECC coprocessor has the characteristics of high flexibility and high processing speed. It can support scalable and parameterized Weierstrass curves over GF(p) and GF(2m)and the algorithms of signature and verification can be improved in the future. Experimental result shows that the time to process a ECC point multiplication over 192 bit-GF(p) is only 0.32 ms, which is 116%~350% faster than other similar ECC chips.

Key words: Euiptic Curve Crypto System(ECC), parallel, reconfigurable, specific instruction-set, coprocessor

中图分类号: