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计算机工程 ›› 2009, Vol. 35 ›› Issue (8): 125-127. doi: 10.3969/j.issn.1000-3428.2009.08.042

• 软件技术与数据库 • 上一篇    下一篇

一种自适应的存储器访问乱序调度机制

杨 磊1,2,逄 珺1,2,时 磊1,2,张铁军1,王东辉1,侯朝焕1   

  1. (1. 中国科学院声学研究所数字系统集成实验室,北京 100190;2. 中国科学院研究生院,北京 100190)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2009-04-20 发布日期:2009-04-20

Adaptive Reordering Scheduling Mechanism of Memory Access

YANG Lei1,2, PANG Jun1,2, SHI Lei1,2, ZHANG Tie-jun1, WANG Dong-hui1, HOU Chao-huan1   

  1. (1. Digital System Integration Lab, Institute of Acoustics, Chinese Academy of Sciences, Beijing 100190;2. Graduate University of Chinese Academy of Sciences, Beijing 100190)
  • Received:1900-01-01 Revised:1900-01-01 Online:2009-04-20 Published:2009-04-20

摘要: 存储器访问速度已经成为现代处理器系统中的瓶颈。对于存储器访问的调度可以有效地提高存储器带宽利用率。基于一种称为突发调度的机制进行改进,通过使用优先级表达式从各个块里选择最合适的突发来访问存储器,运用自适应的方法来调节优先级表达式里各项的系数,使得这一方法针对不同的应用都能取得好的效果。通过运行SPEC CPU2000测试程序和stream程序,与顺序访问机制以及突发调度机制相比,该自适应调度机制将总线利用率分别提高了52%和4.8%。

关键词: 同步动态随机存储器, 存储器组, 突发, 自适应

Abstract: Speed of memory access is a bottleneck in modern computer system. The out-of-order scheduling of memory access can improve bus utilization of memory effectively. Based on a reordering mechanism called burst scheduling, this paper proposes a priority formula to select the most appropriate burst in each bank to access memory, and an adaptive mechanism is introduced to adjust coefficients of priority formula to adapt different applications. Compared with conventional in-order memory access and burst scheduling, the adaptive mechanism improves bus utilization by 52% and 4.8% respectively, by running SPEC CPU2000 benchmarks and stream.

Key words: SDRAM, memory bank, burst, adaptive

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