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计算机工程 ›› 2009, Vol. 35 ›› Issue (16): 228-230. doi: 10.3969/j.issn.1000-3428.2009.16.082

• 工程应用技术与实现 • 上一篇    下一篇

可配置宏的快速FPGA布局算法

徐嘉伟,来金梅,童家榕   

  1. (复旦大学专用集成电路与系统国家重点实验室,上海 201203)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2009-08-20 发布日期:2009-08-20

Algorithm of Macro-Configurable Fast FPGA Placement

XU Jia-wei, LAI Jin-mei, TONG Jia-rong   

  1. (State Key Lab of ASIC & Systems, Fudan University, Shanghai 201203)
  • Received:1900-01-01 Revised:1900-01-01 Online:2009-08-20 Published:2009-08-20

摘要: 提出一种可配置宏模块的快速FPGA布局算法。用解析模型确定所有宏模块及基本逻辑模块的理想位置,通过局部扩散得到一个合理的初始布局方案,用低温模拟退火进一步优化,确定各模块的最终位置。以平方线网总长度为目标函数,与VPR算法相比,该算法能较好地处理宏模块,大大降低布局所耗费的时间,不影响最终布局方案的质量。

关键词: 宏模块, 二次规划, 快速布局, 模拟退火

Abstract: A fast FPGA placement algorithm which can deal with macro blocks is proposed. It takes advantage of an analytical method to figure out the ideal positions of all the blocks. It adjusts the positions of the blocks by local expansion. The typical simulated annealing algorithm is used to refine the placement at a low temperature. Experimental results show that in comparison with the popular VPR algorithm, the algorithm can deal with macro blocks elegantly and speeds up the placement greatly without deteriorating the quality of final placement.

Key words: macro blocks, quadratic programming, fast placement, simulated annealing

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