摘要：

提出将线性扫描算法用于传输触发体系结构(TTA)编译器的后端优化设计中，实现全局寄存器分配。线性扫描算法的应用使TTA编译器具有生成目标代码质量高、算法的时间和空间复杂度低、易于实现等优点。实验结果表明，该算法在寄存器数目相同，且有大量的变量竞争时具有明显优势。

关键词: 传输触发体系结构, 可配置处理器, 线性扫描, 编译器, 全局寄存器分配

Abstract:

This paper presents a compiler’s back-end optimizing design for Transport Triggered Architecture(TTA) processor using linear scan algorithm, the algorithm is used to accomplish global register allocation. The application of this algorithm makes TTA compiler so many advantages, such as the quality of code obtained is high, time and space complexity is low, and implementation is easy. Experimental results show that the advantages of the algorithm are especially obvious when source programs contain large number of variables competing for same number of registers.

Key words: Transport Triggered Architecture(TTA), configurable processors, linear scan, compiler, global register allocation

中图分类号: 

• TP311