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计算机工程 ›› 2010, Vol. 36 ›› Issue (13): 211-212,215. doi: 10.3969/j.issn.1000-3428.2010.13.075

• 工程应用技术与实现 • 上一篇    下一篇

SM8260 Cache应用验证的性能测试分析

钟 华1,谭敏生1,罗 杨1,胡小龙2   

  1. (1. 南华大学计算机科学与技术学院,衡阳 421001;2. 中南大学信息科学与工程学院,长沙 410083)
  • 出版日期:2010-07-05 发布日期:2010-07-05
  • 作者简介:钟 华(1981-),男,讲师、硕士,主研方向:嵌入式系统开发;谭敏生、罗 杨,教授、硕士;胡小龙,副教授、博士

Performance Measurement Analysis of SM8260 Cache Application Validation

ZHONG Hua1, TAN Min-sheng1, LUO Yang1, HU Xiao-long2   

  1. (1. School of Computer Science and Technology, University of South China, Hengyang 421001; 2. School of Information Science and Engineering, Central South University, Changsha 410083)
  • Online:2010-07-05 Published:2010-07-05

摘要: 根据CPU芯片应用验证的方法,给出写通模式下SM8260 Cache应用验证的流程及其硬件平台设计。分析L1 Cache, L2 Cache的初始化过程,对写通模式下的SM8260 L1 Cache, L2 Cache进行基准测试和大数组操作测试。测试结果表明,在大数组情况下,使用L2 Cache在一定程度上可提高嵌入式通信系统的性能。

关键词: 一级缓存, 二级缓存, 应用验证, 性能测试

Abstract: According to the method of CPU chip application validation, this paper presents the test process and design of hardware platform used for SM8260 Cache application validation in write-through mode. It analyzes the initial process of SM8260 L1 Cache and L2 Cache, carries out benchmark tests and large array tests on write-through mode. Test results indicate that the use of L2 Cache can improve system performance in embedded system to some extent in the case of large array.

Key words: L1 Cache, L2 Cache, application validation, performance measurement

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