作者投稿和查稿 主编审稿 专家审稿 编委审稿 远程编辑

计算机工程 ›› 2010, Vol. 36 ›› Issue (14): 206-208. doi: 10.3969/j.issn.1000-3428.2010.14.075

• 工程应用技术与实现 • 上一篇    下一篇

基于FPGA的τ因子内插滤波器设计与仿真

丁 红1,王庆东2   

  1. (1. 上海第二工业大学计算机与信息学院,上海 201209;2. 华中科技大学计算机科学与技术学院外存储系统国家专业实验室,武汉 430074)
  • 出版日期:2010-07-20 发布日期:2010-07-20
  • 作者简介:丁 红(1975-),女,讲师、硕士,主研方向:嵌入式应用,网络存储;王庆东,博士后
  • 基金资助:
    国家自然科学基金资助项目(60303031)

Design and Simulation of Interpolator of τ Factor Based on FPGA

DING Hong1, WANG Qing-dong2   

  1. (1. Institute of Computer and Information, Shanghai Second Polytechnic University, Shanghai 201209; 2. National Storage System Laboratory, School of Computer Science & Technology,Huazhong University of Science and Technology, Wuhan 430074)
  • Online:2010-07-20 Published:2010-07-20

摘要: 针对传统的由锁相环构成的伺服时钟恢复电路噪声干扰大、锁定时间长的问题,在线性插值时钟恢复的基础上进行改进,提出基于τ因子的内插时钟模型,并推导出τ因子内插滤波器系数算法,设计内插滤波器的FPGA实现方案并进行仿真。实验结果证明,采用τ因子内插滤波器可以获得更好的谐波频谱,解决了传统硬盘伺服时钟恢复电路的噪声问题。

关键词: 内插滤波器, 滤波系数算法, τ因子, 谐波频谱

Abstract: This paper proposes an interpolation timing recovery model based on τ factor on the basis of improvement in linear interpolation clock recovery model, because traditional servo phase-locked loop timing recovery circuit has the problem of noise interference and long time lock. It conducts the algorithm of interpolator coefficient based on τ factor, researches and simulates the implementation of interpolator by FPGA. Experimental results show that the interpolated timing recovery model based on τ factor can obtain better harmonic frequency and solves the noise problem of traditional harddisk servo timing recovery circuit.

Key words: interpolator, algorithm of interpolation coefficient, τ factor, harmonic frequency

中图分类号: