计算机工程 ›› 2010, Vol. 36 ›› Issue (16): 273-275.doi: 10.3969/j.issn.1000-3428.2010.16.097

• 开发研究与设计技术 • 上一篇    下一篇

微处理器Cache的验证方法研究

李 智,李 怡,龚令侃,章建雄   

  1. (华东计算技术研究所,上海 200233)
  • 出版日期:2010-08-20 发布日期:2010-08-17
  • 作者简介:李 智(1985-),男,硕士研究生,主研方向:计算机系统结构,数字系统设计;李 怡,工程师;龚令侃,硕士;章建雄,研究员

Research on Verification Method of Microprocessor Cache

LI Zhi, LI Yi, GONG Ling-kan, ZHANG Jian-xiong   

  1. (East-China Institute of Computer Technology, Shanghai 200233)
  • Online:2010-08-20 Published:2010-08-17

摘要: 在微处理器功能验证中,由于高速缓存(Cache)是软件(即测试程序)不可见的,对其进行芯片级验证难以获得高的可控制性(测试场景构造)和可观测性(验证结果检测)。基于此,提出通过验证平台调用的方法,为软件提供服务和管理Cache,构造测试场景。采样由Cache引起的微处理器系统总线行为检测验证结果。实验结果表明,该方法方便测试程序开发,减少验证时间。

关键词: 高速缓存, 芯片级验证, 验证平台调用, 验证库, 监视器, 指令集模拟器

Abstract: In the functional verification of microprocessor, because of the invisibility of Cache, chip-level verification of Cache is difficult to obtain high controllability(construction of a particular test scenario) and observability(detection of test results). This paper presents a novel approach, which provides services for the construction of test scenario by Testbench Call(Tb Call) to help software control Cache, and records behavior of Cache-initiated system bus operations and checks the results of simulation. Experimental result shows that the method is easy to develop test program and reduces verification time.

Key words: Cache, chip-level verification, Testbench Call(Tb Call), verification library, monitor, Instruction Set Simulator(ISS)

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