关键词: 高速缓存, 芯片级验证, 验证平台调用, 验证库, 监视器, 指令集模拟器

Abstract: In the functional verification of microprocessor, because of the invisibility of Cache, chip-level verification of Cache is difficult to obtain high controllability(construction of a particular test scenario) and observability(detection of test results). This paper presents a novel approach, which provides services for the construction of test scenario by Testbench Call(Tb Call) to help software control Cache, and records behavior of Cache-initiated system bus operations and checks the results of simulation. Experimental result shows that the method is easy to develop test program and reduces verification time.

Key words: Cache, chip-level verification, Testbench Call(Tb Call), verification library, monitor, Instruction Set Simulator(ISS)