摘要： 扫描链阻塞技术可以有效地降低电路测试时的峰值和平均功耗，但是扫描测试应用时间有所增加。为了解决这一问题，通过有效利用测试向量之间的相容性，提出一种基于TSP问题的降低测试应用时间的方法。实验结果表明，该方法能够较大幅度地降低测试应用时间。

关键词: 可测性设计, 扫描链阻塞技术, 无关位填充, 确定性测试, 低费用测试

Abstract: Scan chain disable techniques effectively reduce peak and average test power dissipation. But the test application time is longer. To solve this problem, this paper proposes an approach based on TSP problem to minimize the test application time by exploring the compatibility among the test vectors. Experimental results demonstrate that this approach reduces test application time drastically on various benchmark circuits.

Key words: design for testability, scan chain disable technique, don’t care bit filling, deterministic test, low-cost test

中图分类号: 

• TP302.8