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计算机工程 ›› 2011, Vol. 37 ›› Issue (21): 205-207. doi: 10.3969/j.issn.1000-3428.2011.21.070

• 工程应用技术与实现 • 上一篇    下一篇

双模系统信道估计FFT处理器的硬件实现

陈 琛,杨玉庆,闫 娜   

  1. (复旦大学专用集成电路与系统国家重点实验室,上海 201203)
  • 收稿日期:2011-05-19 出版日期:2011-11-05 发布日期:2011-11-05
  • 作者简介:陈 琛(1984-),男,硕士研究生,主研方向:数字集成电路设计;杨玉庆,博士;闫 娜,讲师、博士
  • 基金资助:
    国家“863”计划基金资助重点项目(2009AA011605)

Hardware Implementation of FFT Processor for Dual-mode System Channel Estimation

CHEN Chen, YANG Yu-qing, YAN Na   

  1. (State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China)
  • Received:2011-05-19 Online:2011-11-05 Published:2011-11-05

摘要: 针对GSM/TD-SCDMA双模系统的信道估计问题,设计一个32/128点可配置的FFT/IFFT处理器。采用一种新的4路MRMDF结构同时处理4路信号,并支持4路多输入多输出系统。仿真结果表明,该处理器能以较少的硬件消耗使数据吞吐率提高4倍,在110 MHz的时钟下,功耗仅为46.8 mW。

关键词: 双模系统, 信道估计, 可配置处理器, 多输入多输出, 数据吞吐率

Abstract: The paper presents a configurable 32/128 FFT/IFFT processor which is designed for the channel estimation of GSM/TD-SCDMA dual-mode communication system. A novel four-channel Mixed-radix Multipath Delay Feedback(MRMDF) architecture is applied in the processor. The proposed architecture can handle four-channel signal, and is suitable for 4-channel Multiple-Input and Multiple-Output(MIMO) systems. The data throughput rate can have a 4-fold increase by less hardware consumption. The design is verified by the Altera platform and synthesized in the 0.18 μm 1P6M technology. The power consumption is about 46.8 mW.

Key words: dual-mode system, channel estimation, configurable processor, Multiple-input and Multiple-output(MIMO), data throughput rate

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