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计算机工程 ›› 2012, Vol. 38 ›› Issue (7): 253-256. doi: 10.3969/j.issn.1000-3428.2012.07.083

• 开发研究与设计技术 • 上一篇    下一篇

一种静态LoC关键性预测器设计

李清波1,苟鹏飞1,孙 骏2,杨 兵1,王进祥1   

  1. (1. 哈尔滨工业大学微电子中心,哈尔滨 150001;2. 上海航天控制工程研究所,上海 200072)
  • 收稿日期:2011-08-09 出版日期:2012-04-05 发布日期:2012-04-05
  • 作者简介:李清波(1985-),男,硕士研究生,主研方向:微处理器体系结构,程序控制指令;苟鹏飞,博士研究生;孙 骏,硕士研究生;杨 兵,博士后;王进祥,教授、博士生导师

Design of Static LoC Key Predictor

LI Qing-bo    1, GOU Peng-fei   1, SUN Jun   2, YANG Bing   1, WANG Jin-xiang    1   

  1. (1. Microelectronics Center, Harbin Institute of Technology, Harbin 150001, China; 2. Shanghai Institute of Control Engineering for Aerospace, Shanghai 200072, China)
  • Received:2011-08-09 Online:2012-04-05 Published:2012-04-05

摘要: 针对不同分簇超标量处理器结构下SPEC2000程序中指令关键可能性(LoC)的特性,提出一种静态LoC关键性预测器的设计方法。对指令LoC进行研究,根据其结构无关性和动态不变性,设计预测器。仿真结果表明,在对1×8分簇超标量处理器使用该设计时,程序的每周期指令数平均提升5.3%,性能优于动态LoC预测器。

关键词: 超标量处理器, 结构无关性, 动态不变性, 静态预测, 指令调度

Abstract: Aiming at instruction Likelihood of Criticality(LoC) of SPEC2000 programs under different clustered superscalar processor architectures, this paper proposes a design of static LoC key predictor. It discusses the instruction LoC, and finds that it has some characteristics, such as architecture-independent and dynamic-invariable. This paper uses this characteristics above to design the predictor. Simulation results show that when 1×8 cluster super-scalar processor uses the design, the program Instruction per Clock(IPC) average increases by 5.3%, and the perfor- mance is better than the dynamic LoC predictors.

Key words: superscalar processor, structure independence, dynamic invariability, static prediction, instruction schedule

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