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计算机工程 ›› 2012, Vol. 38 ›› Issue (13): 221-223. doi: 10.3969/j.issn.1000-3428.2012.13.066

• 工程应用技术与实现 • 上一篇    下一篇

基于覆盖率的微处理器运算单元验证技术

李智广,章建雄,王玉艳   

  1. (中国电子科技集团公司第三十二研究所,上海 200233)
  • 收稿日期:2011-11-01 出版日期:2012-07-05 发布日期:2012-07-05
  • 作者简介:李智广(1986-),男,硕士研究生,主研方向:数字系统设计;章建雄,研究员;王玉艳,高级工程师
  • 基金资助:
    上海市自然科学基金资助项目“嵌入式CPU”(B17AI060- 07139)

Arithmetic Unit Verification Technology of Microprocessor Based on Coverage Rate

LI Zhi-guang, ZHANG Jian-xiong, WANG Yu-yan   

  1. (The 32nd Research Institute of China Electronics Technology Group Corporation, Shanghai 200233, China)
  • Received:2011-11-01 Online:2012-07-05 Published:2012-07-05

摘要: 根据微处理器运算单元功能较多的特点,基于覆盖率的验证方法,设计一种自检查的测试程序生成器(SATG)验证方法。SATG采用一种“闭环”结构,并以功能覆盖率量化分析为核心,使用随机生成和约束求解的方法,自动生成验证程序。实验结果表明,该方法在微处理器运算单元的验证中,能提高验证效率和覆盖率,增强验证平台的可重用性。

关键词: 功能验证, 运算单元, 约束求解, 随机生成, 覆盖率, SystemVerilog语言

Abstract: According to the verification method based on coverage and the feature of arithmetic unit of microprocessor, this paper designs a Self-checking Automatic Test program Generator(SATG). SATG adopts a kind of “closed cycle” structure, takes the quantitative analysis of the functional coverage as the kernel module, and uses the randomly generating method and the constraint solving method, generating verification programs automatically. Experimental results show that the method can improve the efficiency and coverage of verification and enhance the reusability of verification platform.

Key words: functional verification, arithmetic unit, constraint solving, random generation, coverage rate, SystemVerilog language

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