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计算机工程

• 体系结构与软件技术 • 上一篇    下一篇

基于FPGA的海底回波信号模拟器

蒋磊1,陈朋1,金峰1,韩礼波2   

  1. (1.浙江工业大学信息工程学院,杭州 310023; 2.杭州应用声学研究所,杭州 310012)
  • 收稿日期:2014-09-30 出版日期:2015-10-15 发布日期:2015-10-15
  • 作者简介:蒋磊(1988-),男,硕士研究生,主研方向:嵌入式系统;陈朋,副教授、博士;金峰,硕士研究生;韩礼波,工程师、硕士。
  • 基金资助:
    国家自然科学基金资助项目(61303139)。

FPGA-based Seabed Echo Signal Simulator

JIANG Lei  1,CHEN Peng  1,JIN Feng  1,HAN Libo  2   

  1. (1.College of Information Engineering,Zhejiang University of Technology,Hangzhou 310023,China; 2.Hangzhou Applied Acoustics Research Institute,Hangzhou 310012,China)
  • Received:2014-09-30 Online:2015-10-15 Published:2015-10-15

摘要: 以海上测试和水池测试为主的多普勒计程仪测试存在周期长、成本较高等缺点。为此,根据多普勒计程仪的测速原理,研究深度和速度模拟原理,在现场可编程门阵列(FPGA)的基础上,设计一种新的海底回波信号模拟器。该模拟器模拟海底回波信号,在多普勒计程仪接收模拟的回波信号后进行计算,从而得到深度和速度值,对比设定值以达到检验多普勒计程仪的目的。实验结果证明该模拟器的测量误差较小。

关键词: 多普勒计程仪, 模拟器, 现场可编程门阵列, Verilog语言, 回波信号

Abstract: Doppler log test has the disadvantage of long cycle and high cost which is given priority to sea and pool testing.According to the principle of Doppler log measuring,the principle of depth and speed simulation is studied.This paper designs a new signal simulator based on Field Programmable Gate Array(FPGA),it can simulate the seabed echo signal.The seabed echo signal is received by the Doppler log.The values of depth and speed are given by calculating.By comparing the set values,the measurement is accomplished.Experimental result indicates that the measuring error of this simulator is small.

Key words: Doppler log, simulator, Field Programmable Gate Array(FPGA), Verilog language, echo signal

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