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计算机工程

• 软件技术与数据库 • 上一篇    下一篇

基于流访问特征的多级硬件预取

贾迅,翁志强,胡向东   

  1. (上海高性能集成电路设计中心,上海 201204)
  • 收稿日期:2015-01-06 出版日期:2016-01-15 发布日期:2016-01-15
  • 作者简介:贾迅(1989-),男,硕士研究生,主研方向为计算机系统结构;翁志强,工程师;胡向东,高级工程师。
  • 基金资助:
    “核高基”重大专项“超级计算机处理器研发”(2013ZX01028-001-001-001)。

Multiple Level Hardware Prefetching Based on Stream Access Features

JIA Xun,WENG Zhiqiang,HU Xiangdong   

  1. (Shanghai High Performance IC Design Center,Shanghai 201204,China)
  • Received:2015-01-06 Online:2016-01-15 Published:2016-01-15

摘要: 硬件数据预取技术将处理器可能访问的数据提前装入Cache中,使得处理器访存时尽量命中Cache,提升系统性能。但现有研究和应用主要对一级Cache进行预取,预取的数据可能在使用前无法及时装入Cache,从而降低硬件预取对系统性能的提升效果。针对上述问题,以流访问 特征的预取为基础,提出一种同时对多级Cache进行预取的方法,并对流访问特征的预取进行实现。基于SPEC CPU2000测试程序集的实验结果表明,与仅对一级Cache进行预取相比,对多级Cache同时进行预取可以将整数程序的性能平均提升2.11%,最高提升11.19%,浮点程序的 性能平均提升3.08%,最高提升12.77%。

关键词: 存储墙, 流访问, 处理器, 多级Cache, 硬件预取

Abstract: Technique of hardware data prefetching loads data to Cache before they are actually referenced by processor,thus improves the system performance.Existing research and application focus on prefetching data only to the first level Cache.In this way,the prefetched data may arrive at Cache after they are used and decrease the performance of hardware data prefetching.This paper proposes a technique of prefetching multiple levels of Caches based on a stream-based prefetcher.Performance analysis for SPEC CPU2000 shows that the proposed technique can improve the performance of integer applications by 2.11% on average,11.19% at most,float applications 3.08% on average,12.77% at most,compared with only prefetching the first level Cache.

Key words: memory wall, stream access, processor, multiple level Cache, hardware prefetching

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