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计算机工程 ›› 2008, Vol. 34 ›› Issue (17): 240-241,.

• 工程应用技术与实现 • 上一篇    下一篇

双模容错计算机的设计与实现

李 迅1,李洪峻1,刘庆敖2   

  1. (1. 国防科技大学自动控制系,长沙 410073;2. 空军第一航空学院,信阳 464000)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2008-09-05 发布日期:2008-09-05

Design and Implementation of Two Module Fault Tolerant Computer

LI Xun1, LI Hong-jun1, LIU Qing-ao2   

  1. (1. Department of Automatic Control, National University of Defense Techonology, Changsha 410073; 2. The First Aeronautic Institute of Air Force, Xinyang 464000)
  • Received:1900-01-01 Revised:1900-01-01 Online:2008-09-05 Published:2008-09-05

摘要: 高可靠性的计算机应用环境需要计算机具备容错功能,并要求采用高等级的处理器芯片。该文以高等级的Power PC处理器PC8245为基础,以FPGA为核心,设计双模容错的计算机。由于应用空间限制,该计算机采用了分布式冗余仲裁结构,仲裁逻辑同时运行在主计算机和备份计算机的FPGA中。分析了分布式冗余仲裁算法的有限状态机,论述了通信接口的冗余控制机制。

关键词: 双模容错, PC8245处理器, 分布式仲裁

Abstract: High reliability computer application needs the ability which the computer is fault tolerant, and requests high level CPU. This paper discusses a two module fault tolerant computer, which is based on PC8245 processor and FPGA. Because of the limited space, this computer uses distributed arbitration architecture, the arbitration logic runs in FPGA of the master computer and the backup computer. The finite state machine of the arbitration architecture and the mechanism of the communication interface redundancy control are discussed.

Key words: two module fault tolerant, PC8245, distributed arbitration

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