摘要： 为消除重构时间对可重构计算系统性能的影响，针对多重构模块，提出一种基于动态部分可重构技术的顺序型应用程序模块映射算法。利用动态可重构技术的高效性和灵活性，通过隐藏重构时间，达到减少程序执行时间和提高系统性能的目的。基于JPEG编码测试实例的实验结果表明，运用该算法实现的模块映射方案其程序执行速度是软件实现方式的3.31倍，是硬件方式的2.59倍。

关键词: 可重构计算, 模块映射算法, 动态部分可重构, 重构时间, 现场可编程门阵列

Abstract: In order to reduce the impact of the configuration time to the performance of reconfigurable computing, this paper proposes a module mapping algorithm based on dynamic partial reconfigurable technology for sequential applications. It deals with the mapping of multi-modules. It utilizes the high effectiveness and flexibility of dynamic reconfiguration to hide the configuration time, so that the program execution time can be reduced and the system performance is improved. Experiment based on JPEG encoding example shows that the algorithm achieves 3.31 and 2.59 speedups compared to implementation methods of pure software and pure hardware respectively.

Key words: reconfigurable computing, module mapping algorithm, dynamic partial reconfigurable, configuration time, Field Programmable Gate Array(FPGA)

中图分类号: 

• TP301.6