摘要: 实现H.264实时性面临的主要障碍是计算量大,预测操作占其总计算量的30%以上。该文使用FPGA实现一种以梯度作为判据的快速帧内预测算法。该算法借助FPGA逻辑资源丰富、高速并行运算、I/O接口丰富的特点,采用多级流水线、乒乓操作的电路结构。相应的帧内预测模块结构清晰,处理速度较DSP(TMS320C6211)提高46.41倍,满足了视频图像处理的实时性要求。
关键词:
视频图像压缩,
H.264标准,
帧内预测,
FPGA芯片,
高速图像处理
Abstract: Computing amount is the main obstacle of meeting the real time requirement in H.264. Pre-operation occupies 30 percent of the total computing amount. This paper uses FPGA to realize a kind of intra-prediction algorithm, which decides the intra-prediction mode by the grads. This algorithm uses advantages of FPGA logic such as abundant logical element, high speed parallel computing, abundant I/O ports, and adopts circuit architecture with multilevel pipeline and ping-pong operation. The intra-frame prediction module is clear in architecture, and its processing speed is 46.41 times DSP(TMS320C6211). It meets the real time requirement of video image processing.
Key words:
video image compression,
H.264 standard,
intra-frame prediction,
FPGA chip,
high-speed image processing
中图分类号:
单 博;张 晔;陈 浩. H.264帧内预测的FPGA实现[J]. 计算机工程, 2009, 35(8): 250-252.
SHAN Bo; ZHANG Ye; CHEN Hao. FPGA Implementation of H.264 Intra-frame Prediction[J]. Computer Engineering, 2009, 35(8): 250-252.