摘要： 针对演化硬件中高效的染色体编码问题，该文采用虚拟可重构电路(VRC)实现内进化方式的演化硬件。VRC是由可重配置功能块(CFB)组成的阵列，CFB之间通过多路选择开关电路建立信号传输通道。染色体可以对CFB的功能选择和多路选择开关状态直接进行编码，以此减少自身的长度。实例证明了该方法的有效性。

关键词: 演化硬件, 现场可编程门阵列, 虚拟可重构电路, IP核

Abstract: The efficient chromosome presentation scheme is an important factor in the implementation of Evolvable Hardware(EHW). The Virtual Reconfigurable Circuits(VRC) are employed to realize an internal evolvable hardware experiment explained in this paper. VRC is an array of Configurable Functional Blocks(CFB). By using of the multiplexers, the routings of the circuits in CFB can be created effectively. Function choosing of CFB and switching statuses of multiplexers are encoded directly by chromosomes. In this way, the length of chromosome is decreased. Further more, a concrete example is given in order to prove the validity of the method.

Key words: Evolvable Hardware(EHW), FPGA, Virtual Reconfigurable Circuits(VRC), IP cores

中图分类号: 

• TP301.6