摘要： 在对TMR的容错运行机制予以分析讨论的基础上，针对一种DC电机控制系统进行了基于FPGA芯片的“整体硬化”研究和具体实现。该方式既从原理上摆脱了传统的程序控制概念，消除了“程序跑飞”的隐患，又在结构上减少了因部分硬件单元的故障而导致系统功能整体受损的可能。因此，整个系统在EMI测试环境下表现出了良好的抗干扰性能。

关键词: TMR, 容错, 嵌入式系统, FPGA, EMI

Abstract: According to the basic principle of TMR (three module redundancy), the details are discussed and implemented in a fault-tolerance DC motor controller, which is not composed of any kind of traditional CPU but only FPGA chip structured by VHDL language. Since there is no program in this embedded system, there will be no dangerous of IP corruption that all program-based CPUs tend to suffer. Apart of that, if any single module in FPGA becomes invalid, it will be isolated immediately from the system, and the other two will take the responsibility of keeping the system running correctly. This approach increases the reliability of the embedded applications above in the presents of EMI.

Key words: TMR, Fault tolerance, Embedded system, FPGA, EMI

中图分类号: 

• TP302.8