作者投稿和查稿 主编审稿 专家审稿 编委审稿 远程编辑

计算机工程 ›› 2010, Vol. 36 ›› Issue (16): 18-20. doi: 10.3969/j.issn.1000-3428.2010.16.007

• 博士论文 • 上一篇    下一篇

AES和Camellia算法的可重构硬件实现

杨宏志,韩文报,李光松   

  1. (解放军信息工程大学信息工程学院,郑州 450002)
  • 出版日期:2010-08-20 发布日期:2010-08-17
  • 作者简介:杨宏志(1978-),男,博士研究生,主研方向:密码理论;韩文报,教授、博士、博士生导师;李光松,讲师、博士
  • 基金资助:

    国家自然科学基金资助重大项目(90104035);国家“863”计划基金资助项目(2006AA01Z425)

Reconfigurable Hardware Implementation of AES and Camellia Algorithm

YANG Hong-zhi, HAN Wen-bao, LI Guang-song   

  1. (Institute of Information Engineering, PLA Information Engineering University, Zhengzhou 450002)
  • Online:2010-08-20 Published:2010-08-17

摘要:

AES算法和Camellia算法是应用最广泛的分组密码算法,其可重构性和高速实现具有重要的理论意义和实用价值。在对算法原理进行分析的基础上,研究AES和Camellia算法的可重构性,基于S盒变换,利用并行处理和重构技术,给出它们的可重构体系结构,并在此基础上高速实现了AES、Camellia算法。实验结果表明,采用该设计方案,算法实现速度快,电路资源开销小。

关键词: 分组密码, 可重构, S盒

Abstract:

AES and Camellia are the two most widely used block cipher algorithms. The reconstruction and high-speed implementation characteristics of them are very important in both theories and practices. In this paper, on the foundation of analyzing the algorithms, the reconfiguration of AES and Camellia is studied. Based on the S-box transformation, reconfigurable architecture of the two algorithms is given by parallel processing and reconfigurable technology. Moreover, high-speed realizations of AES and Camellia algorithms are proposed using the reconfigurable architecture. Testing results show the scheme has a higher speed and it can reduce the area cost greatly.

Key words: block cipher, reconfigurable, S-box

中图分类号: