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计算机工程 ›› 2011, Vol. 37 ›› Issue (15): 226-227,231. doi: 10.3969/j.issn.1000-3428.2011.15.073

• 工程应用技术与实现 • 上一篇    下一篇

高速大容量固态存储器设计

陆 浩1,2,王振占2   

  1. (1. 中国科学院研究生院,北京 100049;2. 中国科学院空间科学与应用研究中心,北京 100190)
  • 收稿日期:2011-01-25 出版日期:2011-08-05 发布日期:2011-08-05
  • 作者简介:陆 浩(1988-),男,博士研究生,主研方向:嵌入式系统,集成电路设计;王振占,研究员、博士生导师
  • 基金资助:
    中国科学院“百人计划”基金资助项目

Design of High-rate Mass-capacity Solid-state Memory

LU Hao  1,2, WANG Zhen-zhan  2   

  1. (1. Graduate University of Chinese Academy of Sciences, Beijng 100049, China; 2. Center for Space Science and Applied Research, Chinese Academy of Sciences, Beijing 100190, China)
  • Received:2011-01-25 Online:2011-08-05 Published:2011-08-05

摘要: 为满足信息的高速大容量存储需求,提出基于闪存(FLASH)的固态存储器设计方法。介绍FLASH的结构、存储操作的实现方法和高速存储等相关技术。以通用串行总线和现场可编程门阵列(FPGA)可编程设计为基础,通过FPGA对多片FLASH的编程控制实现高速大容量存储。仿真结果证明,该方法能实现80 MB/s的数据记录速度和20 MB/s的数据回放速度,以及256 GB的存储容量。

关键词: 现场可编程门阵列, 通用串行总线, 闪存, 大容量, 流水线技术

Abstract: To satisfy high-rate mass-capacity data recording, a novelty record device is introduced by the paper based on FLASH. The method to operate FLASH array and the skill about high-rate record are described. Based on Universal Serial Bus(USB) and FPGA technique, several FLASH slices work together controlled by FPGA to complete high-rate mass-capacity. The design utilizes module method and pipelining technology. Simulation result shows that the system can achieve data recording speed of 80 MB/s, data playback speed of 20 MB/s, storage capacity of 256 GB.

Key words: Field Programmable Gate Array(FPGA), Universal Serial Bus(USB), FLASH, mass-capacity, pipelining technique

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