作者投稿和查稿 主编审稿 专家审稿 编委审稿 远程编辑

计算机工程 ›› 2018, Vol. 44 ›› Issue (11): 56-61. doi: 10.19678/j.issn.1000-3428.0048888

• 体系结构与软件技术 • 上一篇    下一篇

基于预布去耦电容的片上电源噪声抑制策略

高成振,马永飞,孙战先,柯希明   

  1. 上海高性能集成电路设计中心,上海 201204
  • 收稿日期:2017-10-10 出版日期:2018-11-15 发布日期:2018-11-15
  • 作者简介:高成振(1994—),男,硕士研究生,主研方向为高性能CPU物理设计;马永飞,工程师;孙战先,助理工程师;柯希明,高级工程师。
  • 基金资助:
    “核高基”重大专项“超级计算机处理器研发”(2013ZX01028-001-001-001)

Suppress Strategy to On-chip Power Noise Based on Pre-placement Decoupling Capacitor

GAO Chengzhen,MA Yongfei,SUN Zhanxian,KE Ximing   

  1. Shanghai High Performance IC Design Center,Shanghai 201204,China
  • Received:2017-10-10 Online:2018-11-15 Published:2018-11-15

摘要:

去耦电容是抑制电源噪声的有效方法,为平衡去耦电容插入量与去耦电容泄漏功耗,提出一种新的预布去耦电容策略,以抑制电源噪声。在芯片物理设计的布局布线阶段之前,预先均匀地插入一定数量的去耦电容,以优化去耦电容布局并改善电源噪声。实验结果表明,采用该策略后,仅增加1%的去耦电容插入量,能够减小7.2%的瞬态电压降,且当预布的去耦电容面积占芯片总面积的4%~6%时,能够取得较好的噪声抑制效果。

关键词: 去耦电容, 电源完整性, 电源噪声, 片上, 预布

Abstract: The decoupling capacitor is an effective method to suppress the power noise.In order to balance the decoupling capacitor insertion and the leakage power of decoupling capacitor,a new pre-placement decoupling capacitor strategy is proposed to suppress the power noise.In order to optimize the decoupling capacitor layout and improve the power supply noise, a certain number of decoupling capacitors are inserted uniformly in advance before the layout and routing phase of the chip physical design.Experimental results show that,after the usage of the proposed strategy,only 1% of the decoupling capacitor insertion can reduce the transient voltage drop by 7.2%,and the better noise suppression effect can be obtained when the area of the decoupling capacitor of the pre-placement is 4% to 6% of the total area of the chip.

Key words: decoupling capacitor, power integrity, power noise, on-chip, pre-placement

中图分类号: