Abstract: Aiming at the problem of existing researches without taking into account the impact on power consumption when access different Scratch Pad Memory(SPM) addresses sequence. This paper proposes a SPM low power strategy based on circuit activity through reorganizing the layout of instructions and data in SPM, it reduces the circuit activity and power consumption when access memory objects in SPM. Experimental result shows that an average reduction of more than 15% in the energy consumption, compared with basic strategy without the consideration of circuit activity.

Key words: circuit activity, compiler optimization, power consumption, Scratch Pad Memory(SPM)

摘要： 针对现有的功耗管理未考虑高速暂存存储器(SPM)中不同的地址访问序列对功耗的影响问题，提出一种基于电路活跃度的SPM低功耗管理策略。通过重新组织指令与数据在SPM中的布局，降低SPM中存储对象访问时的电路活跃度，从而降低功耗。实验结果表明，与不考虑电路活跃度的基本策略相比，该分配策略可平均减少功耗15%以上。

关键词: 电路活跃度, 编译优化, 功耗, 高速暂存存储器

CLC Number: 

• TP314