×
模态框(Modal)标题
在这里添加一些文本
Close
Close
Submit
Cancel
Confirm
×
模态框(Modal)标题
×
Search
E-mail
RSS
Author Login
Editor-in-Chief
Peer Review
Editor Work
Office Work
Toggle navigation
Computer Engineering
Home
Journal
Editorial Office
About Journal
Indexed-in & awards
Subscription
Journal Online
Just Accepted
Current Issue
Archive
Most Access
Most Download
Most Cited
Email Alert
RSS
Authors
Guidelines
Editorial Board
Editor-in-Chief
Editorial Board
Publishing Ethics
Download
Contact Us
中文
Author Login
Editor-in-Chief
Peer Review
Editor Work
Office Work
×
Quick Search
Efficient Partial-parallel Architecture for Fast Modular Multiplication in GF(2m)
JIANG Jing-fei; NI Xiao-qiang; ZHANG Min-xuan
Computer Engineering . 2007, (
18
): 4 -7 . DOI: 10.3969/j.issn.1000-3428.2007.18.002