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计算机工程 ›› 2008, Vol. 34 ›› Issue (1): 241-243. doi: 10.3969/j.issn.1000-3428.2008.01.083

• 工程应用技术与实现 • 上一篇    下一篇

多处理器芯片组中PCI桥控制器的设计与实现

方志斌1,2,孙凝晖1,安学军1,胡 鹏1,2   

  1. (1. 中国科学院计算技术研究所计算机系统结构重点实验室,北京 100080;2. 中国科学院研究生院,北京 100039)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2008-01-05 发布日期:2008-01-05

Design and Implementation of PCI Bridge Controller in Multi-processor Chipset

FANG Zhi-bin1,2, SUN Ning-hui1, AN Xue-jun1, HU Peng1,2   

  1. (1. Key Lab of Computer System and Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100080; 2. Graduate School, Chinese Academy of Sciences, Beijing 100039)
  • Received:1900-01-01 Revised:1900-01-01 Online:2008-01-05 Published:2008-01-05

摘要: 分析了多处理器芯片组内通信和PCI通信的特点,设计并实现了在切入通信机制下的PCI桥控制器,该控制器在FPGA布局布线后可以达到66 MHz,有效隐藏PCI协议中的突发传送和读延迟机制给多处理器切入通信带来的性能损耗。该控制器已稳定运行在龙芯多处理器系统中。

关键词: PCI桥控制器, 多处理器, 芯片组, 切入

Abstract: This paper analyzes the features of communication in multi-processor chipset and PCI communication. It designs and implements PCI bridge controller in cut-through communication. The frequency of the controller is up to 66 MHz after placing and routing in FPGA, and it can effectively hide the delay of performance brought by burst transfer and delay read in PCI protocol in multi-processor cut-through communication. The PCI controller is used in Godson multi-processor system.

Key words: PCI bridge controller, multi-processor, chipset, cut-through

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