计算机工程 ›› 2010, Vol. 36 ›› Issue (1): 251-252,.doi: 10.3969/j.issn.1000-3428.2010.01.087

• 开发研究与设计技术 • 上一篇    下一篇

5加数并行加法器及其进位接口

刘 杰1,易茂祥2   

  1. (1. 阜阳师范学院物理与电子科学学院,阜阳 236041;2. 合肥工业大学应用物理系,合肥 230009)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2010-01-05 发布日期:2010-01-05

Parallel Adder with Five Addend and Its Carry Interface

LIU Jie1, YI Mao-xiang2   

  1. (1. School of Physics and Electronic Science, Fuyang Normal College, Fuyang 236041;
    2. Department of Applied Physics, Hefei University of Technology, Hefei 230009)
  • Received:1900-01-01 Revised:1900-01-01 Online:2010-01-05 Published:2010-01-05

摘要: 传统加法器在处理多操作数累加时,必须进行多次循环相加操作。针对该问题设计5操作数并行加法器及其高速进位接口。电路采用多操作数并行本位相加和底层进位级联传递的方式,在一定程度上实现多操作数间的并行操作,减少相加次数。模拟结果验证了该加法器的设计合理性,证明其能缩短累加时间、提高运算效率。

关键词: 加法器, 超前进位加法器, 进位接口

Abstract: Traditional adder must do several times of cyclic addition operation in processing of multi-operand accumlation. Aiming at this problem, this paper designs a five addend parallel adder and its high speed carry interface. Because the circuit uses parallel own department addition of multi-operands and bottom layer carry cascade connection transmission mode, the parallel operation between multi-operands is realized and addition times are reduced. Simulation results verify the design reasonability of the adder and prove that it can shorten addition time, enhance operation efficiency.

Key words: adder, Carry Look-Ahead Adder(CLAA), carry interface

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