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计算机工程 ›› 2012, Vol. 38 ›› Issue (23): 236-239. doi: 10.3969/j.issn.1000-3428.2012.23.058

• 工程应用技术与实现 • 上一篇    下一篇

一种用于DSP芯片的串行通信接口设计

胡焰胜1,王 多1,李天阳2,张树丹1,2   

  1. (1. 江南大学电子工程系,江苏 无锡 214122;2. 中国电子科技集团公司第五十八研究所,江苏 无锡 214035)
  • 收稿日期:2012-02-10 出版日期:2012-12-05 发布日期:2012-12-03
  • 作者简介:胡焰胜(1986-),男,硕士研究生,主研方向:数字集成电路设计与验证;王 多,硕士研究生;李天阳,硕士;张树丹,教授级高级工程师
  • 基金资助:
    国家科技重大专项基金资助项目“面向终端应用的高性能、低功耗嵌入式DSP”(2009ZX01034-001-002-003)

Design of a Serial Communication Interface Used in DSP Chip

HU Yan-sheng 1, WANG Duo 1, LI Tian-yang 2, ZHANG Shu-dan 1,2   

  1. (1. Department of Electronic Engineering, Jiangnan University, Wuxi 214122, China; 2. The 58th Research Institute of China Electronics Technology Group Corporation, Wuxi 214035, China)
  • Received:2012-02-10 Online:2012-12-05 Published:2012-12-03

摘要: 常用的同步串行通信接口数据传输时存在灵活性差和数据传输速率较低的问题。为此,设计一种新的串行通信接口及其数据传输协议,加入多种通信数据类型和地址预测等功能。利用VHDL硬件描述语言完成RTL级描述,并用TSMC 65 nm CMOS工艺进行综合。仿真和综合结果显示该接口的数据传输速率可达125 MHz,适用于一款32位数字信号处理器。

关键词: 同步串行通信, 数据传输协议, 地址预测, 硬件描述语言, CMOS工艺

Abstract: In general, the synchronous serial communication interfaces often have the problems of low data transfer rate and poor flexibility when transfering data. A fully new serial communication interface is proposed in this paper. A new data transfer protocol is defined, in which multiple data types and the function of address prediction are added. The interface circuit is implemented by the Hardware Description Language(VHDL) and synthesized in TSMC’s 65 nm CMOS process. Simulation and synthesis results coincide with high data transfer rate of 125 MHz, and the design is successfully applied in a 32-bit Digital Signal Processor(DSP).

Key words: synchronous serial communication, data transfer protocol, address prediction, hardware description language, CMOS process

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