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计算机工程 ›› 2019, Vol. 45 ›› Issue (6): 115-118,126. doi: 10.19678/j.issn.1000-3428.0051185

• 体系结构与软件技术 • 上一篇    下一篇

基于双倍步长数据流的硬件预取机制

王锦涵,李俊,路冬冬,张海龙,朱英   

  1. 上海高性能集成电路设计中心,上海 201204
  • 收稿日期:2018-04-12 出版日期:2019-06-15 发布日期:2019-06-15
  • 作者简介:王锦涵(1993—),男,硕士研究生,主研方向为高性能处理器设计;李俊、路冬冬,工程师;张海龙,助理工程师;朱英,高级工程师。
  • 基金资助:

    核高基重大专项“超级计算机处理器研制”(20172X01028101-001)。

Hardware prefetching mechanism based on double step data stream

WANG Jinhan,LI Jun,LU Dongdong,ZHANG Hailong,ZHU Ying   

  1. Shanghai High Performance IC Design Center,Shanghai 201204,China
  • Received:2018-04-12 Online:2019-06-15 Published:2019-06-15

摘要:

硬件数据预取技术可以有效提升处理器的访存性能,但传统流预取策略存在预取不及时的问题。为此,提出一种双倍步长流预取策略,并设计对应的预取部件结构。预取部件自动检测数据流的固定步长并将该步长扩大为原有的2倍,以计算预取地址。实验结果表明,加入该预取部件后,运行SPEC2006测试集的整数应用与浮点应用时,处理器性能最高可分别提升45%与57%,针对Cache Miss率较高的应用,该预取部件可以有效隐藏访存延时。

关键词: 硬件预取, 双倍步长, 流预取, SPEC2006测试集, Cache Miss率

Abstract:

Hardware data prefetching technology can effectively improve the memory access performance of processors,but the traditional stream prefetching strategy has the problem of untimely prefetching.Therefore,a double step stream prefetching strategy is proposed,and the corresponding prefetching component structure is designed.The prefetching component automatically detects the fixed step size of the data stream and enlarges the step size to twice of the original one to calculate the prefetching address.Experimental results show that the performance of the processor can be improved by 45% and 57% respectively when SPEC2006 test set integer application and floating-point application are run with the prefetching component.For applications with high Cache Miss rate,the prefetch component can effectively hide the memory access latency.

Key words: hardware prefetching, double step, stream prefetching, SPEC2006 test set, Cache Miss rate

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