VelociTI结构浮点DSPs寄存器堆读写的流水线设计

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作者投稿和查稿主编审稿专家审稿编委审稿远程编辑

胡正伟;仲顺安;陈禾

Pipeline Design for Reading and Writing of Register File of DSPs
Based on VelociTI Architecture

HU Zheng-wei; ZHONG Shun-an; CHEN He

计算机工程 . 2007, (21): 237 -239 . DOI: 10.3969/j.issn.1000-3428.2007.21.084