Abstract: This paper presents the design of a HDTV decoder SoC platform that is integrated with IP cores such as MIPs CPU, HDTV video decoder, video processor, OSD and many peripheral IP devices. Cores can be integrated with the platform through non-glue wrappers. By estimating the bus and memory access bandwidth it can manage the data path effectively. It is also much flexible to append new functions without changing the system structure. So the SoC architecture fits wide application of digital media processing.

Key words: SoC platform design, System architecture, Digital media processing

摘要： 提出了一种HDTV解码器片上系统(SoC)平台的设计，可进行多种IP核的集成，如MIPs CPU、HDTV视频解码器、视频处理器、OSD及外围IP设备，这些IP核分别可通过一个独立的接口与平台相连接。通过对总线和存储器访问带宽的估计，可以进行有效的数据通路管理。无需改变平台的系统结构就可灵活地添加新的功能，因此该SoC架构适合广泛地应用于数字视频媒体处理。

关键词: 片上系统平台设计, 系统架构, 数字媒体处理