Abstract:
This paper presents a bit manipulation accelerator for high performance DSP. The accelerator is implemented with multiple levels of bit manipulator instead of MUX, it reduces the time complexity of the accelerator from O(N) to O( ). Synthesis results indicate that the 32-bit bit manipulation accelerator implemented with this method has great improvement in terms of delay.
Key words:
Bit extraction,
Bit expansion,
Bit acceleration
摘要： 介绍了一种高性能DSP位操作加速器实现方法。该方法通过使用分层位操作电路取代分层MUX选择电路实现位操作加速来减少电路时延，使得位操作加速器的时间复杂度从O(N)降到了O( )。综合结果表明使用该方法设计的32-位位操作加速器有很大的性能提升。
关键词:
位抽取,
位扩展,
位加速
SUN Chuanming; FU Yuzhuo; XU Ruhao. Design of Bit Manipulation Accelerator for High Performance DSP[J]. Computer Engineering, 2006, 32(24): 280-282.
孙传名;付宇卓;徐如淏. 高性能DSP位操作加速器设计[J]. 计算机工程, 2006, 32(24): 280-282.