Abstract: This paper analyzes the architecture of joint TCM decoder and equalizer which suits for IEEE802.3ab std.. 1000Base-T gigabit Ethernet transceiver in 0.13μm CMOS process. Look-ahead technologies available for 1000Base-T are studied to optimize the look-ahead structures employed in the joint TCM decoder and equalizer. Hardware complexity of the decoder is decreased by those approaches without performance scaled down. 8.7k gates of 14tap MA4 decoder is saved after optimization, which is about 9% of original circuits. The gate count of 14tap PDFD is decreased by 9.5k, which saves about 6% in area after optimization.

Key words: 1000Base-T, gigabit Ethernet, M-algorithm, parallel decision feedback decoder, look-ahead technology

摘要： 分析了0.13 μm CMOS工艺下适合于IEEE 802.3 ab标准1000Base-T千兆以太网收发器的联合解码均衡器结构。通过分析适用于1000 Base-T的超前计算技术，对超前计算结构进行了优化，降低了现有联合解码均衡器在0.13 μm工艺下的硬件复杂度。通过物理设计确定了优化的联合解码均衡器的算法与结构。优化后，14抽头MA4在0.13 μm工艺下门数减少了8.7 k，约9%，14抽头并行判决反馈解码器门数减少了9.5 k，约6%。

关键词: 1000Base-T, 千兆以太网, M算法, 并行判决反馈解码器, 超前计算技术

CLC Number: 

• TN47