Abstract:
This paper proposes a CSD-based architecture namely CDA for computing inner product when one of the input vectors is fixed, and designs 2-D Discrete Cosine Transform(DCT) architecture with it. By optimizing the transform matrix, it reduces the number of the adders and the band of the shifter/adder. It is designed and synthesized by Chartered 0.13 μm technology, and its cost is 31 528 transistors and 1 024 bit memory. Because the architecture is with low power and high performance, it is useful for image/video compression and transmission applications.
Key words:
Discrete Cosine Transform(DCT),
Distributed Arithmetic(DA),
low power
摘要: 提出一种基于CSD编码的向量内积分布式计算结构CDA,将其应用于二维离散余弦变换(DCT)硬件设计,利用DCT变换矩阵的编码特点减少设计中加法器的数量及移位累加树的带宽。该结构在Chartered 0.13 μm工艺库上进行设计和综合,共用了31 528个晶体管和1 024 bit存储器,具有低功耗与高性能的特点,适用于图像视频等要求低功耗、实时处理的领域。
关键词:
离散余弦变换,
分布式算法,
低功耗
CLC Number:
LI Zhen-wei; PENG Si-long; MA Hong. Design of Low-power DCT Hardware Architecture[J]. Computer Engineering, 2008, 34(16): 7-9.
李振伟;彭思龙;马 鸿. 一种低功耗DCT硬件结构的设计[J]. 计算机工程, 2008, 34(16): 7-9.