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Computer Engineering ›› 2011, Vol. 37 ›› Issue (19): 221-223. doi: 10.3969/j.issn.1000-3428.2011.19.073

• Networks and Communications • Previous Articles     Next Articles

Design and Implementation of High Speed Data Acquisition System Based on FPGA

SHAO Lei, NI Ming   

  1. (The 32nd Research Institute of China Electronics Technology Group Corporation, Shanghai 200233, China)
  • Received:2011-04-15 Online:2011-10-05 Published:2011-10-05

基于FPGA的高速数据采集系统设计与实现

邵 磊,倪 明   

  1. (中国电子科技集团公司第三十二研究所,上海 200233)
  • 作者简介:邵 磊(1984-),男,硕士研究生,主研方向:计算机系统结构,嵌入式系统;倪 明,研究员
  • 基金资助:

    国家部委基金资助项目

Abstract: This paper designs a high speed data acquisition system based on Field Programmable Gate Array(FPGA). It makes AT84AD001B high-speed A/D converter and Stratix II series of FPGA as data collection and processing main body, and goes on performance index test on Compact Peripheral Component Interconnect(cPCI). Result shows that the sampling rate is 1 GS/s dual channel and sampling rate is 2 GS/s single channel alternate parallel data acquisition performance, front analog signal conditioning performance for 200 MHz bandwidth, 5 times magnification. It has the characteristics of modularization, sturdiness, high reliability and scalability.

Key words: Field Programmable Gate Array(FPGA), high speed data acquisition, high speed A/D, analog signal conditioning

摘要: 设计一种基于现场可编程门阵列(FPGA)的高速数据采集系统,将AT84AD001B高速A/D转换器与Stratix II系列的FPGA作为数据采集和处理主体,并在紧凑型外部设备互连系统平台上进行性能指标测试。结果表明,该系统可实现采样率为1 GS/s的双通道和采样率为2 GS/s的单通道交替并行数据采集性能,以及带宽达到200 MHz、放大倍数达到5倍的前端模拟信号调理性能,具有模块化、坚固性、可靠性和可扩展性等特点。

关键词: 现场可编程门阵列, 高速数据采集, 高速A/D, 模拟信号调理

CLC Number: