Abstract: For the purpose to improve the safety of Ultrahighfrequency(UHF) Radio Frequency Identification(RFID) systems, an encryption algorithm is needed to be integrated into an RFID tag chip. By analyzing the principles and the application methods of the algorithm Grain-128, this paper designs the hardware architecture of the algorithm, and implements on an Field Programmable Gate Array(FPGA) using VHDL language. Experimental results show that the algorithm takes 384 clock cycles to generate the key stream for encryption, and only occupies 54 Slices of FPGA logic resources, can be applied into an RFID chip for safety purpose in future work.

Key words: encryption algorithm, Radio Frequency Identification(RFID), Field Programmable Gate Array(FPGA), Grain-128 algorithm, tag, Ultrahighfrequency(UHF)

摘要： 为提高超高频射频识别(RFID)系统的安全性，需在RFID标签芯片中集成必要的加密算法。为此，通过分析Grain-128加密算法的工作原理和在实际应用中的使用方法，设计算法的硬件架构，并采用VHDL语言编写，在现场可编程门阵列(FPGA)芯片上进行实现。实验结果表明，该算法共需384个时钟周期产生可供加解密的密钥流，仅占用54个Slices的FPGA逻辑资源，可用于在RFID标签芯片中进行安全加密。

关键词: 加密算法, 射频识别, 现场可编程门阵列, Grain-128算法, 标签, 超高频

CLC Number: 

• TP391