Abstract:
A protective relay test device based on Fast Fourier Transform(FFT) algorithm is designed. In this system, double CPU(host CPU and slave CPU) are adopted. Host CPU adopts MCU which is mainly used to display the man-machine interface and carry argument input. Slave CPU adopts Digital Signal Processor(DSP) which mainly runs the FFT algorithm. In the double CPU system communication between host and slave, CPU uses the principle of share memory in parallel communication. By means of applying message control mechanism, it reduces the interrupt times and increases the real-time performance of test.
Key words:
message control,
share memory,
Fast Fourier Transform(FFT),
Digital Signal Processor(DSP)
摘要: 设计一种基于快速傅里叶变换(FFT)算法的继电保护测试仪。该系统采用双CPU的结构,上位机为MCU,主要用于人机界面和参数的输入,下位机为DSP,主要用于FFT算法的运算。在双CPU系统中,上下位机的通信采用并行通信中的共享内存原理。通过应用消息控制机制,上下位机能有效减少通信中的中断次数,提高测试的实时性。
关键词:
消息控制,
共享内存,
快速傅里叶变换,
数字信号处理器
CLC Number:
LIU Hong-hai; HOU Xiang-hua; JIANG Yun-liang. Design of Protective Relay Test Device Based on Double CPU[J]. Computer Engineering, 2010, 36(9): 257-259.
刘红海;侯向华;蒋云良. 基于双CPU的继电保护测试仪设计[J]. 计算机工程, 2010, 36(9): 257-259.