Abstract:
This paper applies Fast Multipole Method(FMM) to Nbody application, analyzes and implements major computing tasks on CPU and Digital Signal Processor(DSP) separately. It proposes the reconfigurable ASIC contained multicore DSP construction model based FMM. Taking Field Programmable Gate Array(FPGA) for example, it evaluates the better energy efficiency when revolved in floating point applications on the model.
Key words:
Fast Multipole Method(FMM),
energy efficiency analysis,
reconfigurable system,
Digital Signal Processor(DSP),
Field Program- mable Gate Array(FPGA)
摘要: 对快速多极方法(FMM)进行研究,分析其关键计算任务,并在CPU与DSP上进行验证,得出FMM在不同平台上性能和功耗的量化分析结果,给出基于FMM的多核DSP可重构ASIC结构模型。以可重构硬件FPGA为例,对该模型进行预测,结果证明其在涉及大规模浮点计算时具有一定的能效优势。
关键词:
快速多极方法,
能效分析,
可重构系统,
数字信号处理器,
现场可编程逻辑门阵列
CLC Number:
TU Hua-Chao, KONG Xue, WANG Xu, CHU Yong-Xin, HE Wei-Feng, NI Meng, XIE Guang-Wei, LEI Yong-Mei, CHAN Jian-Chen. Energy Efficiency Analysis of Fast Multipole Method and Its Assessment of ASIC Feasibility[J]. Computer Engineering, 2011, 37(13): 265-268.
余学涛, 孔雪, 王绪, 祝永新, 何卫锋, 倪明, 谢光伟, 雷咏梅, 单健晨. FMM能效分析及其ASIC可行性评估[J]. 计算机工程, 2011, 37(13): 265-268.