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Author Login Editor-in-Chief Peer Review Editor Work Office Work
Author Login Editor-in-Chief Peer Review Editor Work Office Work
Schedule and Interconnection at High Level Synthesis in VLSI
WEN Dongxin; WANG Ling; YANG Xiaozong
Computer Engineering . 2007, (13): 40 -42，7 .  DOI: 10.3969/j.issn.1000-3428.2007.13.014

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