计算机工程 ›› 2009, Vol. 35 ›› Issue (1): 207-209,.doi: 10.3969/j.issn.1000-3428.2009.01.071

• 工程应用技术与实现 • 上一篇    下一篇

高速数据采集系统设计

张俊杰,章凤麟,叶家骏   

  1. (上海大学特种光纤与光接入网教育部重点实验室,上海 200072)
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2009-01-05 发布日期:2009-01-05

Design of High Speed Data Acquisition System

ZHANG Jun-jie, ZHANG Feng-lin, YE Jia-jun   

  1. (Key Laboratory of Special Fiber Optics and Optical Access Networks, Ministry of Education, Shanghai University, Shanghai 200072)
  • Received:1900-01-01 Revised:1900-01-01 Online:2009-01-05 Published:2009-01-05

摘要: 为满足雷达信号采集的要求,设计一个12 bit 100 MS/s的基于PCI总线的数据采集系统。该系统能够实现6 GB数据的实时采集与存储。可编程逻辑器件控制数据的采集、存储与传输。PCI数据传输采用PCI 主模式,传输速率达到60 MB/s,采集信号的信噪比达到55 dB(30 MHz模拟信号)。

关键词: PCI控制器, 可编程器件, 抖动, 信噪比

Abstract: A 100 MS/s data acquisition system based on PCI bus is designed to meet the need of high-speed radar signal sampling. The 6 GB sampling ADC data can be saved on this card and transferred to the computer simultaneously, which is controlled by one FPGA chip. The transfer rate between this card and the computer can reach up 60 MB/s. The SNR of the sampled data can reach 55 dB at 30 MHz.

Key words: PCI controller, FPGA, jitter, SNR

中图分类号: