计算机工程

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基于AHB总线的嵌入式中断控制器设计

晏 敏1,戴荣新1,蔡益军2,徐 欢1,郑 乾1,程 呈1   

  1. (1. 湖南大学物理与微电子科学学院,长沙 410082;2. 深圳市晶沛电子有限公司,广东 深圳 518109)
  • 收稿日期:2013-05-03 出版日期:2014-06-15 发布日期:2014-06-13
  • 作者简介:晏 敏(1963-),男,副教授,主研方向:嵌入式系统,数字集成电路设计;戴荣新,硕士研究生;蔡益军,工程师;徐 欢、郑 乾、程 呈,硕士研究生。
  • 基金项目:
    2011年湖南省科技计划基金资助项目(858204021);2010年湖南省教改基金资助项目(521298480)。

Design of Embedded Interrupt Controller Based on Advanced High-performance Bus

YAN Min 1, DAI Rong-xin 1, CAI Yi-jun 2, XU Huan 1, ZHENG Qian 1, CHENG Cheng 1   

  1. (1. School of Physics and Electronics, Hunan University, Changsha 410082, China; 2. Jinpat Electronics Co., Ltd., Shenzhen 518109, China)
  • Received:2013-05-03 Online:2014-06-15 Published:2014-06-13

摘要: 针对嵌入式系统集成度高、专用性强的特点,设计一种基于AHB总线的嵌入式中断控制器。采用AHB总线接口,增强中断控制器的通用性和可移植性,ARM处理器通过AHB总线访问中断寄存器,实现中断检测、响应、处理以及优先级的配置。该设计采用verilog-HDL语言编写,利用SMIC的0.18 μm CMOS工艺进行逻辑电路综合和布局布线。测试结果表明,在正常工作条件下,该中断控制器的功耗为5.36 mW,在50 MHz时钟下完成一次中断操作最多需要0.7 μs,可满足实时性和低功耗的要求。

关键词: 嵌入式系统, AHB总线, 中断控制器, 优先级, 实时性, 低功耗

Abstract: According to the embedded system’s characteristics of high integration and strong specificity, an embedded interrupt controller is designed based on the Advanced High-performance Bus(AHB). Interrupt controller enhances versatility and portability by using AHB interface. Advanced RISC Machines(ARM) processor can access the interrupt registers through the AHB bus to realize the interrupt detection, response, processing and priority configuration. The design is programmed by verilog-HDL language. Logic circuit is integrated, placed and routed by using the SMIC 0.18 μm CMOS process. Test results show that power consumption is 5.36 mW under normal working conditions, the worst situation for completing one interrupt operation only needs 0.7 μs, which can meet the requirements of real-time and low power consumption.

Key words: embedded system, Advanced High-performance Bus(AHB), interrupt controller, priority, real-time, low power con- sumption

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