作者投稿和查稿 主编审稿 专家审稿 编委审稿 远程编辑

计算机工程

• 体系结构与软件技术 • 上一篇    下一篇

BWDSP104X字节寻址模式扩展及64位数据运算模拟实现

赵高义,郑启龙   

  1. (中国科学技术大学 计算机科学与技术学院,合肥 230027)
  • 收稿日期:2015-06-04 出版日期:2016-08-15 发布日期:2016-08-15
  • 作者简介:赵高义(1989-),男,硕士研究生,主研方向为并行计算、编译技术;郑启龙,副教授。
  • 基金资助:
    “核高基”重大专项(2012ZX01034001001)。

Byte Addressing Mode Expansion and 64bit Data Operation Simulation Implementation for BWDSP104X

ZHAO Gaoyi,ZHENG Qilong   

  1. (School of Computer Science and Technology,University of Science and Technology of China,Hefei 230027,China)
  • Received:2015-06-04 Online:2016-08-15 Published:2016-08-15

摘要: 目前BWDSP104X编译器的编程模型支持以字为单位的寻址方式,不支持非32位宽数据并且不兼容以字节为单位的寻址模式。通过对BWDSP104X前端相关数据类型进行修改,产生基于字节寻址模式的中间代码,而后端由此输出一系列32位机器指令来完成对应的字节地址转换或数据操作,从而实现字节寻址模式的扩展。利用寄存器对模拟实现64位数据的存取与运算,提高浮点数据运算的精度。实验结果表明,该编译器兼容字节寻址模式以及64位浮点数据类型,能较好地满足高速实时信号处理的需求。

关键词: 编译器, 字寻址, 字节寻址, 字节对齐, 64位数据运算, 寄存器对

Abstract: Currently,the programming model under BWDSP104X compiler is based on the word unit addressing modes,lacking of support for non 32-bit wide data and incompatible with byte unit addressing modes.With the modification of related frontend data type,the intermediate code based on byte addressing mode is generated.A series of 32-bit machine instructions is outputted by backend to fulfill byte address transformation or data manipulation,and the expansion of byte addressing mode is implemented.Register pairs are used to simulate 64-bit data access and operation,improving the accuracy of floatingpoint data operation.Experimental results show that the compiler is compatible with the byte addressing mode as well as the 64-bit floatingpoint data type.It can well meet the requirement of highspeed realtime signal processing.

Key words: compiler, word addressing, byte addressing, byte alignment, 64-bit data operation, register pair

中图分类号: