摘要： 为挖掘可重构处理器的内在并行性，需要编译器通过分析程序的并行性来决定可重构处理器硬件最好的执行模式。为此，提出一种基于可重构处理器的并行优化算法。将有向无环图的并行计算部分映射到可重构处理器上，对任务实现3个不同层次的并行性(指令级并行、循环级并行、线程级并行)。测试结果表明，该算法使得可重构处理器在处理任务时比未用并行优化算法的性能提升1.2倍左右。
关键词:
可重构处理器,
并行优化,
并行处理,
任务编译器,
有向无环图
Abstract: As reconfigurable processor hardware is inherently parallel, compiler should determine the best execution mode by analyzing the parallelism. So this paper proposes a parallel optimal algorithm based on reconfigurable processor. The parallel computing part of Direct Acyclic Graph(DAG) is mapped to reconfigurable processor. The task compiler can cover parallelism at three different levels: Instruction-Level Parallelism (ILP), Loop-Level Parallelism(LLP), and Thread-Level Parallelism(TLP). Test result shows that the algorithm leads to an average 1.2-fold speed increase compared with to original systems.
Key words:
reconfigurable processor,
parallel optimization,
parallel processing,
task compiler,
Direct Acyclic Graph(DAG)
中图分类号:
刘石柱, 尹首一, 殷崇勇, 刘雷波, 魏少军. 基于可重构处理器的并行优化算法[J]. 计算机工程, 2012, 38(21): 286-289.
LIU Dan-Zhu, YIN Shou-Yi, YAN Chong-Yong, LIU Lei-Bei, WEI Shao-Jun. Parallel Optimal Algorithm Based on Reconfigurable Processor[J]. Computer Engineering, 2012, 38(21): 286-289.