Abstract:
A 100 MS/s data acquisition system based on PCI bus is designed to meet the need of high-speed radar signal sampling. The 6 GB sampling ADC data can be saved on this card and transferred to the computer simultaneously, which is controlled by one FPGA chip. The transfer rate between this card and the computer can reach up 60 MB/s. The SNR of the sampled data can reach 55 dB at 30 MHz.
Key words:
PCI controller,
FPGA,
jitter,
SNR
摘要: 为满足雷达信号采集的要求,设计一个12 bit 100 MS/s的基于PCI总线的数据采集系统。该系统能够实现6 GB数据的实时采集与存储。可编程逻辑器件控制数据的采集、存储与传输。PCI数据传输采用PCI 主模式,传输速率达到60 MB/s,采集信号的信噪比达到55 dB(30 MHz模拟信号)。
关键词:
PCI控制器,
可编程器件,
抖动,
信噪比
CLC Number:
ZHANG Jun-jie; ZHANG Feng-lin; YE Jia-jun. Design of High Speed Data Acquisition System[J]. Computer Engineering, 2009, 35(1): 207-209,.
张俊杰;章凤麟;叶家骏. 高速数据采集系统设计[J]. 计算机工程, 2009, 35(1): 207-209,.