Abstract: Aiming at the problem that pedestrian detection scheme based on Histogram of Oriented Gradient(HOG) has large computation and poor real-time,this paper designs a HOG feature extraction normalized module embedded Support Vector Machine (SVM) classifier,and applies it to pedestrian detection.It proposes a two-stage pipeline architecture.On the first level,it uses 16×16 pixel scanning,simplifies the histogram generation with Look-up Table(LUT),and it can reduce resources consumption of multiplier.On the second level,the 15-way parallel SVM is embedded itself in the HOG normalization module,and it can reduce bit of 15-way parallel SVM multiply-accumulator through pre-start SVM.Also,an algorithm is proposed to automatically reduce duplicated detection to improve detection accuracy.The scheme is verified for SVGA resolution video(800×600) at 47 frames on Spartan6 Field Programmable Gate Array(FPGA) with 100 MHz and it improves the real-time and accuracy of pedestrian detection.

Key words: Field Programmable Gate Array(FPGA), pipeline, Look-up Table(LUT), Histogram of Oriented Gradient(HOG), Support Vector Machine(SVM)

摘要： 针对基于方向梯度直方图(HOG)的行人检测方案存在运算量大、实时性差的问题,设计一个内嵌支持向量机(SVM)分类器的HOG特征提取归一化模块,并将其应用于行人检测。提出两级流水线架构,第1级采用16×16像素块扫描,并结合查找表的方式生成HOG,以减少乘法器资源 消耗量,第2级将15路并行SVM内嵌到HOG归一化模块中,通过提前启动SVM降低15路SVM乘累加器的位宽。利用面向硬件实现的自动消除检测重复性算法,进一步提高检测准确性。实验结果表明,该方案能够以100 MHz时钟频率运行在Spartan6 FPGA芯片上,每秒可处理47帧SVGA (800×600)分辨率的图像,具有较高的行人检测实时性和准确率。

关键词: 现场可编程门阵列, 流水线, 查找表, 方向梯度直方图, 支持向量机

CLC Number: 

• TP391