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Computer Engineering ›› 2007, Vol. 33 ›› Issue (09): 255-257.

• Engineer Application Technology and Realization • Previous Articles     Next Articles

Access Features of High Density NAND Flash Memory and Interface of NAND Flash Host Controller

CHEN Xiaofeng   

  1. (School of Mathematics and Computer Science, Fujian Normal University, Fuzhou 350007)
  • Received:1900-01-01 Revised:1900-01-01 Online:2007-05-05 Published:2007-05-05

高密度NAND Flash存取性能及其宿主控制器接口

陈晓风   

  1. (福建师范大学数学与计算机科学学院,福州 350007)

Abstract: The paper introduces the internal logical architecture, external pins configuration and functions, the page read operations, the page program operations, the block erase operations, the write protection and command sequences and status polling of K9K8G08U0M high density NAND flash chip. It also provides the NAND flash chips to standard interface with the flash host controller.

Key words: Read modes, Programming modes, Erase mode, Write protection, Polling status, Flash host controller

摘要: 介绍了高密度K9K8G08U0M NAND flash芯片的内部组成、引脚配置、各种读操作、页面编程、块擦除、写保护等操作时序和状态查询。提供了NAND flash存储器与其宿主控制器的标准接口逻辑。

关键词: 读模式, 编程模式, 擦除模式, 写保护, 状态查询, Flash控制器

CLC Number: