摘要： 以EP1S20F672C7 为核心，利用PLX9054 作为密码卡与主机交换数据的接口芯片，采用多个硬件线程并行处理实现3DES 算法，设计了3DES 密码卡。介绍了硬件的构成、原理图的设计、底层软件的编程以及密码算法IP 核的开发。所设计的IP 核具有很高的灵活性，可同时处理1~53 个任务。
关键词:
密码卡；3DES 算法；IPCore
Abstract: Cipher card based on multi-thread 3DES algorithm is designed. The kernel of hardware is EP1S20F672C7. PLX9054 is used as the bridge chip of data exchange between cipher card and host PC. The structure of hardware, the design of principle graph, the program of software and the IP kernel of cipher algorithm are introduced. Designed IP kernel has higher flexibility, and can process 1~53 tasks at the same time.
Key words:
Cipher card; 3DES algorithm; IPcore
邹候文，刘 磊，唐屹. 3DES 密码卡的设计与实现[J]. 计算机工程, 2006, 32(11): 253-255.
ZOU Houwen, LIU Lei, TANG Yi. An Implementation of 3DES Cipher Card[J]. Computer Engineering, 2006, 32(11): 253-255.